Digital video monitors are organized into an array of pixels that are typically organized into a number of horizontal lines displayed in a raster scanning fashion. There may be hundreds of pixels per line and correspondingly hundreds of lines in a single frame of a video monitor display.
Data characterizing each pixel in the array is stored in a memory such as a video RAM, that is adapted for supplying data for the lines of pixels rapidly. In order to support rapid reading of data, the memory supplies data in multibit words that include data corresponding to a plurality of adjacent pixels in a line. The more bits of data supplied in the multibit word, the fewer accesses to the memory required to display a line.
However, the number of bits in a word defines the granularity of control over reading data from the memory. Windowing or panning of displayed data is thus "jumpy" or "uneven" because the multibit word constrains the granularity of the windowing or panning to multipixel increments.
It is desirable to provide for smooth panning and windowing with a granularity of one pixel per frame of data displayed on a monitor. In the prior art, one pixel per frame granularity could only be supported by actually writing the window or panning data into the memory over the displayed background between each frame. Thus, for 8-pixel words, panning on 1 pixel per frame, data would have to be written to the video memory address of each word that is panned 8 times, 1 time between each frame. This algorithm of updating video data is slow and software-intense.
As video displays achieve faster and faster data rates, there is a need for faster and more adaptable techniques for assembling video data to support panning and windowing.